1. Field of the Invention
The present invention relates to a control device for a semiconductor memory device and a method of controlling the semiconductor memory device, and the present invention is particularly suitable for a control device for a semiconductor memory device having an auto precharge function.
2. Description of the Related Art
Hitherto, included among DRAMs (Dynamic Random Access Memories) is an SDRAM (synchronous DRAM) in which an external interface operates in synchronization with a clock signal with a given cycle.
FIG. 11A and FIG. 11B are timing diagrams of a read operation in a conventional SDRAM.
In FIG. 11A and FIG. 11B, FIG. 11A is a timing diagram of a read operation when an undermentioned read command with auto precharge is not used, and FIG. 11B is a timing diagram of a read operation when the read command with auto precharge is used.
First, the read operation when the read command with auto precharge is not used in FIG. 11A will be explained.
When an active command ACTV including a row address outputted from a control device not shown is supplied to the SDRAM at a time T61, the SDRAM brings a page specified by the row address into an active state. At a time T63 after a lapse of a period of time tRCD (after which a read command READ can be outputted) from the output of the active command ACTV, the read command READ including a column address outputted from the control device is supplied to the SDRAM. At a time T65 after a lapse of a period of time tCL from the output of the read command READ, the SDRAM outputs (reads) data DT stored in an address specified by the column address in the page brought into the active state by the active command ACTV.
Thereafter, for example, when a read operation is performed for a page different from the page brought into the active state (a row address different from the row address included in the active command ACTV outputted at the time T61), the control device supplies a precharge command PRE to the SDRAM at a time T66 after a lapse of a period of time tRAS from the output of the active command ACTV. After the precharge command PRE is supplied to the SDRAM, the SDRAM performs a precharge operation in which data in the page brought into the active state is written again to the same address to thereby bring the page into an idle state. Subsequently, at a time T68 after a lapse of a period of time tRP from the time T66, the control device can output the active command ACTV, and the same operation is performed.
Next, the read operation when the read command with auto precharge is used in FIG. 11B will be explained.
When an active command ACTV including a row address outputted from the control device not shown is supplied to the SDRAM at a time T81, the SDRAM brings a page specified from the row address into an active state. At a time T85 after a lapse of a predetermined period of time from the output of the active command ACTV, a read command READA with auto precharge including a column address outputted from the control device is supplied to the SDRAM. Incidentally, the predetermined period of time means a lapse of a period of time tRCD (after which the read command can be outputted) from the output of the active command, and a period of time obtained by subtracting a period of time tBL corresponding to a burst length from a period of time tRAS from the output of the ACTV command until when the precharge operation becomes possible.
Thereafter, the SDRAM to which the read command READA is supplied starts a precharge operation, in which data in the page brought into the active state is written again in the same address, at a time T86 after the period of time tBL corresponding to the burst length and thereby brings the page into the idle state. Further, the SDRAM, at a time T87, outputs (reads) data DT stored in an address specified by the column address in the page brought into the active state. As stated above, when the read command READA with auto precharge is supplied to the SDRAM, the SDRAM outputs the data in the address specified by the column address and performs the precharge operation automatically.
Thereafter, at a time T88 after a lapse of a period of time tRP from the time T86, the control device can output the active command ACTV.
Similarly, also in a write operation in the conventional SDRAM, there is a write command WRITA with auto precharge for automatically performing the precharge operation as well as the write operation.
In the conventional SDRAM, however, although the read command READA or write command WRITA with auto precharge which enables the read operation or the write operation and the precharge operation to be performed by one read command is provided, an improvement in performance such as data transfer efficiency or the like can not be attained because of various timing constraints such as the period of time tRAS from the output of the active command ACTV until when the precharge operation becomes possible (a period of five clocks in FIG. 11B), and hence the read command READA and write command WRITA with auto precharge have been hardly used.
However, a memory called an FCRAM (Fast cycle RAM) has come into use recently, and the various timing constraints such as the period of time tRAS are greatly eased. In the FCRAM, after one clock from the supply of the active command, the precharge operation can be performed. In other words, commands can be supplied continuously to perform operations, and hence the improvement in performance such as data transfer efficiency can be attained by the read command and write command with auto precharge.
When only the read command or write command with auto precharge is used, in the FCRAM, a page, which is brought into the active state after the data read or write operation in an address specified by the read command or write command with auto precharge, is inevitably brought into the idle state. Therefore, when the read operation or the write operation is performed for the same page, the control device needs to supply the active command again to the FCRAM, and hence when only the read command or write command with auto precharge is used, the performance such as data transfer efficiency is lowered in some cases.